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商品詳細
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware SRAM Design and Test. 2008 ed.
・ISBN 978-1-4020-8362-4 hard EUR 159.99
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| 著者・編者 | Pavlov, Andrei / Sachdev, Manoj, |
|---|---|
| シリーズ | (Frontiers in Electronic Testing) |
| 出版社 | (Springer-Verlag New York Inc., US) |
| 出版年月 | 2008 |
| ページ数 | 194 pp. |
| 言語 | ENG |
| ニュース番号 | <A05-55913> |
解説
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies.