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Guide to RISC Processors: for Programmers and Engineers. 2005 ed.
・ISBN 978-0-387-21017-9 hard EUR 49.99
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| 著者・編者 | Dandamudi, Sivarama P., |
|---|---|
| 出版社 | (Springer-Verlag New York Inc., US) |
| 出版年月 | 2005 |
| ページ数 | 388 pp. |
| 言語 | ENG |
| ニュース番号 | ＜A05-55375＞ |
解説
Recently, there has been a trend toward processors based on the RISC (Reduced Instruction Set Computer) design. This is an accessible and all-encompassing compendium on RISC processors, introducing five of them: MIPS, SPARC, PowerPC, ARM, and Intel's 64-bit Itanium. Initial chapters explain differences between the CISC and RISC designs, and the core RISC design principles are clearly discussed. Later chapters provide instruction on MIPS assembly language programming, so that readers can readily learn the concepts and principles introduced earlier. Professionals, programmers, and students in computer architecture and programming courses will find the guide an essential resource.