株式会社極東書店トップ商品一覧Embedded System Design: Modeling, Synthesis and Verification. 2009 ed.

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Embedded System Design: Modeling, Synthesis and Verification. 2009 ed.

Embedded System Design: Modeling, Synthesis and Verification. 2009 ed.

・ISBN 978-1-4899-8530-9 paper EUR 49.99

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お気に入り
著者・編者Gajski, Daniel D. / Abdi, Samar / Gerstlauer, Andreas / Schirner, Gunar,
出版社 (Springer-Verlag New York Inc., US)
出版年月2014
ページ数352 pp.
言語ENG
ニュース番号<A05-51677>

解説

Embedded System Design: Modeling, Synthesis and Verification introduces a model-based approach to system level design. It presents modeling techniques for both computation and communication at different levels of abstraction, such as specification, transaction level and cycle-accurate level. It discusses synthesis methods for system level architectures, embedded software and hardware components. Using these methods, designers can develop applications with high level models, which are automatically translatable to low level implementations. This book, furthermore, describes simulation-based and formal verification methods that are essential for achieving design confidence. The book concludes with an overview of existing tools along with a design case study outlining the practice of embedded system design. Specifically, this book addresses the following topics in detail:

. System modeling at different abstraction levels

. Model-based system design

. Hardware/Software codesign

. Software and Hardware component synthesis

. System verification

This book is for groups within the embedded system community: students in courses on embedded systems, embedded application developers, system designers and managers, CAD tool developers, design automation, and system engineering.