株式会社極東書店トップ ＞ 商品一覧 ＞ System-level Test and Validation of Hardware/Software Systems. Softcover reprint of hardcover 1st ed. 2005
商品詳細
System-level Test and Validation of Hardware/Software Systems. Softcover reprint of hardcover 1st ed. 2005
・ISBN 978-1-84996-953-6 paper EUR 99.99
￥26,726.- (税込) ※（※）価格はご注文時の参考価格となります。
納品価格につきましては書籍の入荷時点で確定となります。
版元の原価改定、外国為替の変動等により異なる場合がございますので、予めご了承下さい。
| 著者・編者 | Sonza Reorda, Matteo / Peng, Zebo / Violante, Massimo (eds.), |
|---|---|
| シリーズ | (Springer Series in Advanced Microelectronics) |
| 出版社 | (Springer London Ltd, UK) |
| 出版年月 | 2010 |
| ページ数 | 179 pp. |
| 言語 | ENG |
| ニュース番号 | ＜A05-45181＞ |
解説
New manufacturing technologies have made possible the integration of entire systems on a single chip. This new design paradigm, termed system-on-chip (SOC), together with its associated manufacturing problems, represents a real challenge for designers.
SOC is also reshaping approaches to test and validation activities. These are beginning to migrate from the traditional register-transfer or gate levels of abstraction to the system level. Until now, test and validation have not been supported by system-level design tools so designers have lacked the infrastructure to exploit all the benefits stemming from the adoption of the system level of abstraction. Research efforts are already addressing this issue.
This monograph provides a state-of-the-art overview of the current validation and test techniques by covering all aspects of the subject including:
- modeling of bugs and defects;
- stimulus generation for validation and test purposes (including timing errors;
- design for testability.