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Principles of VLSI RTL Design: A Practical Guide. 2011 ed.
・ISBN 978-1-4899-9545-2 paper EUR 89.99
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お気に入り
★★★
| 著者・編者 | Churiwala, Sanjay / Garg, Sapan, |
|---|---|
| 出版社 | (Springer-Verlag New York Inc., US) |
| 出版年月 | 2014 |
| ページ数 | 182 pp. |
| 言語 | ENG |
| ニュース番号 | ＜A05-42766＞ |
解説
Since register transfer level (RTL) design is less about being a bright engineer, and more about knowing the downstream implications of your work, this book explains the impact of design decisions taken that may give rise later in the product lifecycle to issues related to testability, data synchronization across clock domains, synthesizability, power consumption, routability, etc., all which are a function of the way the RTL was originally written. Readers will benefit from a highly practical approach to the fundamentals of these topics, and will be given clear guidance regarding necessary safeguards to observe during RTL design.