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Timing Channels in Cryptography: A Micro-Architectural Perspective. 2015 ed.
・ISBN 978-3-319-12369-1 hard EUR 99.99
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| 著者・編者 | Rebeiro, Chester / Mukhopadhyay, Debdeep / Bhattacharya, Sarani, |
|---|---|
| 出版社 | (Springer International Publishing AG, SZ) |
| 出版年月 | 2014 |
| ページ数 | 152 pp. |
| 言語 | ENG |
| ニュース番号 | <A05-38862> |
解説
This book deals with timing attacks on cryptographic ciphers. It describes and analyzes various unintended covert timing channels that are formed when ciphers are executed in microprocessors. The book considers modern superscalar microprocessors which are enabled with features such as multi-threaded, pipelined, parallel, speculative, and out-of order execution. Various timing attack algorithms are described and analyzed for both block ciphers as well as public-key ciphers. The interplay between the cipher implementation, the system architecture, and the attack's success is analyzed. Further hardware and software countermeasures are discussed with the aim of illustrating methods to build systems that can protect against these attacks.