株式会社極東書店トップ ＞ 商品一覧 ＞ Offset Reduction Techniques in High-Speed Analog-to-Digital Converters: Analysis, Design and Tradeoffs. 2009 ed.
商品詳細
Offset Reduction Techniques in High-Speed Analog-to-Digital Converters: Analysis, Design and Tradeoffs. 2009 ed.
・ISBN 978-1-4020-9715-7 hard
お気に入り
★★★
| 著者・編者 | Figueiredo, Pedro M. / Vital, Joao C., |
|---|---|
| シリーズ | (Analog Circuits and Signal Processing) |
| 出版社 | (Springer-Verlag New York Inc., US) |
| 出版年月 | 2009 |
| ページ数 | 382 pp. |
| 言語 | ENG |
| ニュース番号 | ＜A05-27286＞ |
解説
Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.