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Fast Simulation of Computer Architectures. Softcover reprint of the original 1st ed. 1995
・ISBN 978-1-4613-6002-5 paper EUR 99.99
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★★★
| 著者・編者 | Conte, Thomas M. / Gimarc, Charles E. (eds.), |
|---|---|
| 出版社 | (Springer-Verlag New York Inc., US) |
| 出版年月 | 2012 |
| ページ数 | 244 pp. |
| 言語 | ENG |
| ニュース番号 | ＜A04-77267＞ |
解説
Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models. The chapters have been written by many of the leading researchers in the area, in a collaboration that ensures that the material is both coherent and cohesive.
Audience: Of tremendous interest to practising computer architect designers seeking timely solutions to tough evaluation problems, and to advanced upper division undergraduate and graduate students of the field. Useful study aids are provided by the problems at the end of Chapters 2 through 8.
Audience: Of tremendous interest to practising computer architect designers seeking timely solutions to tough evaluation problems, and to advanced upper division undergraduate and graduate students of the field. Useful study aids are provided by the problems at the end of Chapters 2 through 8.