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Timing Performance of Nanometer Digital Circuits Under Process Variations. 2018 ed.
・ISBN 978-3-319-75464-2 hard EUR 119.99
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| 著者・編者 | Champac, Victor / Garcia Gervacio, Jose, |
|---|---|
| シリーズ | (Frontiers in Electronic Testing) |
| 出版社 | (Springer International Publishing AG, SZ) |
| 出版年月 | 2018 |
| ページ数 | 185 pp. |
| 言語 | ENG |
| ニュース番号 | <A03-93481> |
解説
This book discusses the digital design of integrated circuits under process variations, with a focus on design-time solutions. The authors describe a step-by-step methodology, going from logic gates to logic paths to the circuit level. Topics are presented in comprehensively, without overwhelming use of analytical formulations. Emphasis is placed on providing digital designers with understanding of the sources of process variations, their impact on circuit performance and tools for improving their designs to comply with product specifications. Various circuit-level "design hints" are highlighted, so that readers can use then to improve their designs. A special treatment is devoted to unique design issues and the impact of process variations on the performance of FinFET based circuits. This book enables readers to make optimal decisions at design time, toward more efficient circuits, with better yield and higher reliability.