株式会社極東書店トップ ＞ 商品一覧 ＞ Design and Test Strategies for 2D/3D Integration for NoC-based Multicore Architectures. 2020 ed.
商品詳細
Design and Test Strategies for 2D/3D Integration for NoC-based Multicore Architectures. 2020 ed.
・ISBN 978-3-030-31309-8 hard EUR 49.99
￥13,361.- (税込) ※（※）価格はご注文時の参考価格となります。
納品価格につきましては書籍の入荷時点で確定となります。
版元の原価改定、外国為替の変動等により異なる場合がございますので、予めご了承下さい。
| 著者・編者 | Manna, Kanchan / Mathew, Jimson, |
|---|---|
| 出版社 | (Springer Nature Switzerland AG, SZ) |
| 出版年月 | 2019 |
| ページ数 | 162 pp. |
| 言語 | ENG |
| ニュース番号 | ＜A03-93222＞ |
解説
This book covers various aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems. It gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling for NoC-based multicores. The authors describe the use of the Integer Line Programming (ILP) technique for smaller benchmarks and a Particle Swarm Optimization (PSO) to get a near optimal mapping and test schedule for bigger benchmarks. The PSO-based approach is also augmented with several innovative techniques to get the best possible solution. The tradeoff between performance (communication or test time) of the system and thermal-safety is also discussed, based on designer specifications.
- Provides a single-source reference to design and test for circuit and system-level approaches to (NoC) based multicore systems;
- Gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling in (NoC) based multicore systems;
- Organizes chapters systematically and hierarchically, rather than in an ad hoc manner, covering aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems.