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商品詳細
Towards Heterogeneous Multi-core Systems-on-Chip for Edge Machine Learning: Journey from Single-core Acceleration to Multi-core Heterogeneous Systems. 2024 ed.
・ISBN 978-3-031-38232-1 paper EUR 84.99
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| 著者・編者 | Jain, Vikram / Verhelst, Marian, |
|---|---|
| 出版社 | (Springer International Publishing AG, SZ) |
| 出版年月 | 2024 |
| ページ数 | 186 pp. |
| 言語 | ENG |
| ニュース番号 | <A03-77387> |
解説
This book explores and motivates the need for building homogeneous and heterogeneous multi-core systems for machine learning to enable flexibility and energy-efficiency. Coverage focuses on a key aspect of the challenges of (extreme-)edge-computing, i.e., design of energy-efficient and flexible hardware architectures, and hardware-software co-optimization strategies to enable early design space exploration of hardware architectures. The authors investigate possible design solutions for building single-core specialized hardware accelerators for machine learning and motivates the need for building homogeneous and heterogeneous multi-core systems to enable flexibility and energy-efficiency. The advantages of scaling to heterogeneous multi-core systems are shown through the implementation of multiple test chips and architectural optimizations.