株式会社極東書店トップ ＞ 商品一覧 ＞ On-Chip Training NPU - Algorithm, Architecture and SoC Design. 2023 ed.
商品詳細
On-Chip Training NPU - Algorithm, Architecture and SoC Design. 2023 ed.
・ISBN 978-3-031-34239-4 paper EUR 99.99
￥26,726.- (税込) ※（※）価格はご注文時の参考価格となります。
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お気に入り
★★★
| 著者・編者 | Han, Donghyeon / Yoo, Hoi-Jun, |
|---|---|
| 出版社 | (Springer International Publishing AG, SZ) |
| 出版年月 | 2024 |
| ページ数 | 237 pp. |
| 言語 | ENG |
| ニュース番号 | ＜A03-65988＞ |
解説
Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.