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商品詳細
Memory Controllers for Mixed-Time-Criticality Systems: Architectures, Methodologies and Trade-offs. Softcover reprint of the original 1st ed. 2016
・ISBN 978-3-319-81196-3 paper EUR 99.99
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| 著者・編者 | Goossens, Sven / Chandrasekar, Karthik / Akesson, Benny / Goossens, Kees, |
|---|---|
| シリーズ | (Embedded Systems) |
| 出版社 | (Springer International Publishing AG, SZ) |
| 出版年月 | 2018 |
| ページ数 | 202 pp. |
| 言語 | ENG |
| ニュース番号 | ＜A03-39556＞ |
解説
This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template.