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Power-Efficient Computer Architectures: Recent Advances.
・ISBN 978-3-031-00617-3 paper EUR 32.99
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| 著者・編者 | Sjaelander, Magnus / Martonosi, Margaret / Kaxiras, Stefanos, |
|---|---|
| シリーズ | (Synthesis Lectures on Computer Architecture) |
| 出版社 | (Springer International Publishing AG, SZ) |
| 出版年月 | 2014 |
| ページ数 | 88 pp. |
| 言語 | ENG |
| ニュース番号 | ＜A02-83660＞ |
解説
As Moore's Law and Dennard scaling trends have slowed, the challenges of building high-performance computer architectures while maintaining acceptable power efficiency levels have heightened. Over the past ten years, architecture techniques for power efficiency have shifted from primarily focusing on module-level efficiencies, toward more holistic design styles based on parallelism and heterogeneity. This work highlights and synthesizes recent techniques and trends in power-efficient computer architecture. Table of Contents: Introduction / Voltage and Frequency Management / Heterogeneity and Specialization / Communication and Memory Systems / Conclusions / Bibliography / Authors' Biographies