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Trustworthy Hardware Design: Combinational Logic Locking Techniques. 2020 ed.
・ISBN 978-3-030-15333-5 hard EUR 119.99
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| 著者・編者 | Yasin, Muhammad / Rajendran, Jeyavijayan (JV) / Sinanoglu, Ozgur, |
|---|---|
| シリーズ | (Analog Circuits and Signal Processing) |
| 出版社 | (Springer Nature Switzerland AG, SZ) |
| 出版年月 | 2019 |
| ページ数 | 142 pp. |
| 言語 | ENG |
| ニュース番号 | ＜A02-75593＞ |
解説
With the popularity of hardware security research, several edited monograms have been published, which aim at summarizing the research in a particular field. Typically, each book chapter is a recompilation of one or more research papers, and the focus is on summarizing the state-of-the-art research.
Different from the edited monograms, the chapters in this book are not re-compilations of research papers. The book follows a pedagogical approach. Each chapter has been planned to emphasize the fundamental principles behind the logic locking algorithms and relate concepts to each other using a systematization of knowledge approach. Furthermore, the authors of this book have contributed to this field significantly through numerous fundamental papers.