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Hardware Architectures for Post-Quantum Digital Signature Schemes. 2021 ed.
・ISBN 978-3-030-57684-4 paper EUR 109.99
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| 著者・編者 | Soni, Deepraj / Basu, Kanad / Nabeel, Mohammed / Aaraj, Najwa / Manzano, Marc / Karri, Ramesh, |
|---|---|
| 出版社 | (Springer Nature Switzerland AG, SZ) |
| 出版年月 | 2021 |
| ページ数 | 170 pp. |
| 言語 | ENG |
| ニュース番号 | ＜A02-61170＞ |
解説
This book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification. The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs.
- Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based;
- Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms;
- Enables designers to build hardware implementations that are resilient to a variety of side-channels.