株式会社極東書店トップ ＞ 商品一覧 ＞ Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies. 2020 ed.
商品詳細
Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies. 2020 ed.
・ISBN 978-3-030-41538-9 paper EUR 99.99
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| 著者・編者 | Canelas, Antonio Manuel Lourenco / Guilherme, Jorge Manuel Correia / Horta, Nuno Cavaco Gomes, |
|---|---|
| 出版社 | (Springer Nature Switzerland AG, SZ) |
| 出版年月 | 2021 |
| ページ数 | 237 pp. |
| 言語 | ENG |
| ニュース番号 | ＜A02-53803＞ |
解説
This book presents a new methodology with reduced time impact to address the problem of analog integrated circuit (IC) yield estimation by means of Monte Carlo (MC) analysis, inside an optimization loop of a population-based algorithm. The low time impact on the overall optimization processes enables IC designers to perform yield optimization with the most accurate yield estimation method, MC simulations using foundry statistical device models considering local and global variations. The methodology described by the authors delivers on average a reduction of 89% in the total number of MC simulations, when compared to the exhaustive MC analysis over the full population. In addition to describing a newly developed yield estimation technique, the authors also provide detailed background on automatic analog IC sizing and optimization.