株式会社極東書店トップ > 商品一覧 > A Designer's Guide to Asynchronous VLSI.
商品詳細
A Designer's Guide to Asynchronous VLSI.
・ISBN 978-0-521-87244-7 hard GB£ 140.00
¥44,352.- (税込) ※(※)価格はご注文時の参考価格となります。
納品価格につきましては書籍の入荷時点で確定となります。
版元の原価改定、外国為替の変動等により異なる場合がございますので、予めご了承下さい。
お気に入り
★★★
| 著者・編者 | Beerel, Peter A. / Ozdag, Recep O. / Ferretti, Marcos, |
|---|---|
| 出版社 | (Cambridge University Press, UK) |
| 出版年月 | 2010 |
| ページ数 | 352 pp. |
| 言語 | ENG |
| ニュース番号 | <A00-52768> |
解説
Create low power, higher performance circuits with shorter design times using this practical guide to asynchronous design. This practical alternative to conventional synchronous design enables performance close to full-custom designs with design times that approach commercially available ASIC standard cell flows. It includes design trade-offs, specific design examples, and end-of-chapter exercises. Emphasis throughout is placed on practical techniques and real-world applications, making this ideal for circuit design students interested in alternative design styles and system-on-chip circuits, as well as circuit designers in industry who need new solutions to old problems.